Microprocessor designers have increasingly endeavored to improve performance in various microprocessors by increasing clock speeds and adding parallelism. Complex data manipulations require execution of a number of instructions, which may require several iterative cycles for various types of data manipulations. Some microprocessors contain special instructions for specific types of data manipulations, but these generally require a number of microcode cycles for execution.
An object of the present invention is to overcome the performance delay caused by iterative execution of microcode for a shift instruction when an operand becomes saturated.